Energy-Efficient Devices and Circuits for Neuromorphic Computing is an important contribution to this field, covering topics from neuron dynamics to energy-efficient CMOS devices and circuits. The book delves into theoretical analysis of learning processes in spiking neural networks, two-terminal neuromorphic devices, material-engineered neuromorphic devices, and novel biomimetic Si devices. It offers insights into the latest developments in non-volatile memory crossbar arrays and emerging post-CMOS devices. Overall, it provides a comprehensive overview of energy-efficient neuromorphic computing architecture. This book is an essential resource for researchers, engineers, and students working in neuromorphic computing and energy-efficient electronics.
1. Cover image - p. c 2. Title page - p. i 3. Copyright - p. iv 4. Dedication - p. v 5. Contents - p. vii 6. Contributors - p. xv 7. Editor Biography - p. xix 8. Foreword - p. xxi 9. Preface - p. xxiii 10. Acknowledgments - p. xxvii 11. Chapter 1 Spiking neural networks: Mathematical models, learning algorithms, and applications - p. 1 12. Chapter 2 Artificial spiking neuron architectures: Devices and circuits for neuromorphic computing - p. 29 13. Chapter 3 The novel energy-efficient neuromorphic computing devices - p. 49 14. Chapter 4 Memristive spiking neurons for neuromorphic applications - p. 97 15. Chapter 5 Memristor-driven neuromorphic computing with crossbar arrays: A hardware perspective - p. 149 16. Chapter 6 Current-controlled memristive synapse for optimized and energy-efficient neuroprocessor - p. 193 17. Chapter 7 Circuit-level compensation techniques to reduce power in resistive memory arrays for neuromorphic computing - p. 225 18. Chapter 8 In-sensor computing: A comprehensive review - p. 245 19. Chapter 9 Low-power 3-D IC-based spiking neural network - p. 285 20. Chapter 10 Achieving energy efficiency in FPGA-based neural network inference accelerators through approximate computing - p. 307 21. Chapter 11 SENECA project: An effort to make a low-power digital neuromorphic processor - p. 335 22. Chapter 12 Neuromorphic computing for traffic prediction in networks-on-chip - p. 355 23. Chapter 13 Transforming AI landscape with neuromorphic computing and chiplets - p. 405 24. Chapter 14 Exploring the realms of echo state networks - p. 429 25. Index - p. 473
Energy-Efficient Devices and Circuits for Neuromorphic Computing is an important contribution to this field, covering topics from neuron dynamics to energy-efficient CMOS devices and circuits. The book delves into theoretical analysis of learning processes in spiking neural networks, two-terminal neuromorphic devices, material-engineered neuromorphic devices, and novel biomimetic Si devices. It offers insights into the latest developments in non-volatile memory crossbar arrays and emerging post-CMOS devices. Overall, it provides a comprehensive overview of energy-efficient neuromorphic computing architecture. This book is an essential resource for researchers, engineers, and students working in neuromorphic computing and energy-efficient electronics.
1. Cover image - p. c 2. Title page - p. i 3. Copyright - p. iv 4. Dedication - p. v 5. Contents - p. vii 6. Contributors - p. xv 7. Editor Biography - p. xix 8. Foreword - p. xxi 9. Preface - p. xxiii 10. Acknowledgments - p. xxvii 11. Chapter 1 Spiking neural networks: Mathematical models, learning algorithms, and applications - p. 1 12. Chapter 2 Artificial spiking neuron architectures: Devices and circuits for neuromorphic computing - p. 29 13. Chapter 3 The novel energy-efficient neuromorphic computing devices - p. 49 14. Chapter 4 Memristive spiking neurons for neuromorphic applications - p. 97 15. Chapter 5 Memristor-driven neuromorphic computing with crossbar arrays: A hardware perspective - p. 149 16. Chapter 6 Current-controlled memristive synapse for optimized and energy-efficient neuroprocessor - p. 193 17. Chapter 7 Circuit-level compensation techniques to reduce power in resistive memory arrays for neuromorphic computing - p. 225 18. Chapter 8 In-sensor computing: A comprehensive review - p. 245 19. Chapter 9 Low-power 3-D IC-based spiking neural network - p. 285 20. Chapter 10 Achieving energy efficiency in FPGA-based neural network inference accelerators through approximate computing - p. 307 21. Chapter 11 SENECA project: An effort to make a low-power digital neuromorphic processor - p. 335 22. Chapter 12 Neuromorphic computing for traffic prediction in networks-on-chip - p. 355 23. Chapter 13 Transforming AI landscape with neuromorphic computing and chiplets - p. 405 24. Chapter 14 Exploring the realms of echo state networks - p. 429 25. Index - p. 473
